US 12,382,743 B2
Solid-state imaging device with enhanced pixel structure and light shielding region for improving image quality
Hiroshi Katayama, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/758,338
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Dec. 16, 2020, PCT No. PCT/JP2020/047032
§ 371(c)(1), (2) Date Jul. 1, 2022,
PCT Pub. No. WO2021/145127, PCT Pub. Date Jul. 22, 2021.
Claims priority of application No. 2020-004989 (JP), filed on Jan. 16, 2020.
Prior Publication US 2023/0044832 A1, Feb. 9, 2023
Int. Cl. H10F 39/00 (2025.01); H10F 39/18 (2025.01)
CPC H10F 39/8063 (2025.01) [H10F 39/182 (2025.01); H10F 39/8053 (2025.01); H10F 39/8057 (2025.01)] 16 Claims
OG exemplary drawing
 
1. A solid-state imaging device, comprising:
a first pixel includes a plurality of photoelectric conversion units and a plurality of on-chip lenses, wherein the plurality of photoelectric conversion units of the first pixel shares a first color filter;
a second pixel adjacent to the first pixel, wherein
the second pixel includes a plurality of photoelectric conversion units and a plurality of on-chip lenses, and
the plurality of photoelectric conversion units of the second pixel shares a second color filter; and
a first light shielding region between the first pixel and the second pixel, wherein
in a case where a width of the first light shielding region is defined as w,
a pitch between the plurality of on-chip lenses in the first pixel is defined as p1,
a height from a virtual plane including a bottom surface of the first light shielding region to a top portion of an on-chip lens of the plurality of on-chip lenses in the first pixel closest to the first light shielding region is defined as h1,
an entering length of light into the plurality of photoelectric conversion units in the first pixel is defined as d1, and
the following relational expression is satisfied:
w>2×((p1/2)×d1/(h1+d1)).