| CPC H10D 89/10 (2025.01) [H10D 88/00 (2025.01); H10D 84/0191 (2025.01); H10D 84/038 (2025.01); H10D 84/854 (2025.01)] | 20 Claims |
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1. A semiconductor device, comprising:
a substrate;
a conductive element disposed within a first region of the substrate;
a first transistor disposed on a second region of the substrate adjacent to the first region of the substrate; wherein
the conductive element is spaced apart from the first transistor and is electrically connected to an electrode of the first transistor through a first metal layer extending from the first region to the second region,
the first metal layer directly contacts the conductive element and is electrically connected to the electrode of the first transistor through a second metal layer disposed on the second region,
the conductive element penetrates through the substrate and is configured to receive a supply voltage, and
the first transistor is configured to control whether the supply voltage is provided to a subsequent element, wherein a path of the supply voltage from the first transistor to the subsequent element non-overlaps the conductive element vertically in a cross-sectional view.
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