| CPC H10D 84/038 (2025.01) [H01L 21/76829 (2013.01); H01L 21/76897 (2013.01); H01L 23/5226 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 62/115 (2025.01); H10D 84/0149 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/834 (2025.01)] | 20 Claims |

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1. A semiconductor device structure, comprising:
a substrate;
a conductive feature on the substrate; and
an electrical connection structure on the conductive feature, wherein the electrical connection structure comprises:
a first grain made of a first metal material; and
a second metal material extending vertically along a first side of a grain boundary of the first grain and laterally along a bottom of the grain boundary of the first grain, wherein the second metal material is different than the first metal material.
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9. A semiconductor device structure, comprising:
a transistor over a substrate;
a contact plug on a source/drain feature of the transistor;
a via on the contact plug, wherein the via comprises:
a plurality of grains made of a first metal material; and
a second metal material including a first portion laterally sandwiched between a first grain and a second grain of the plurality of grains and a second portion vertically sandwiched between the first grain and a third grain of the plurality of grains, wherein the second metal material is different than the first metal material.
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14. A semiconductor device structure, comprising:
a substrate;
a conductive feature on the substrate; and
an electrical connection structure on the conductive feature, wherein the electrical connection structure includes a first grain of a first metal material and a first portion of a second metal material interfaced with a first grain boundary of the first grain of the first metal material, wherein the first portion of the second metal material includes an upper part higher than a top surface of the conductive feature and a lower part lower than the top surface of the conductive feature.
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