US 12,382,693 B2
Semiconductor device and methods of formation
Cheng-Wei Chang, Taipei (TW); Shahaji B. More, Hsinchu (TW); Chi-Yu Chou, Zhubei (TW); Chun Chieh Wang, Kaohsiung (TW); and Yueh-Ching Pai, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Apr. 28, 2022, as Appl. No. 17/661,136.
Prior Publication US 2023/0352564 A1, Nov. 2, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01)
CPC H10D 64/018 (2025.01) [H01L 21/0259 (2013.01); H10D 30/031 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 64/017 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a plurality of nanostructure layers over a semiconductor substrate,
wherein forming the plurality of nanostructure layers includes forming a plurality of sacrificial layers alternating with a plurality of channel layers;
forming cavities at ends of the plurality of sacrificial layers to include surfaces having a first curvature,
wherein the first curvature is included in a range of approximately 0.1 nanometers−1 to approximately 0.4 nanometers−1;
forming, over the ends of the plurality of sacrificial layers, an insulating layer including first concave-shaped regions,
wherein the first concave-shaped regions face away from the plurality of sacrificial layers, and
wherein the first concave-shaped regions have a second curvature;
removing, from the insulating layer including the first concave-shaped regions, portions of the insulating layer to form inner spacers in the cavities,
wherein the inner spacers include second concave-shaped regions, and
wherein the second concave-shaped regions have a third curvature that is lesser relative to the second curvature;
removing the plurality of sacrificial layers,
wherein removing the plurality of sacrificial layers forms areas between the plurality of channel layers; and
forming a gate structure that wraps around the plurality of channel layers,
wherein a portion of the gate structure is formed inside the areas.