US 12,382,683 B2
Semiconductor structure and method of fabricating the same
Tao Long, Shanghai (CN); Pin-Hao Huang, Taipei (TW); and Ze Rui Chen, Milpitas, CA (US)
Assigned to Diodes Incorporated, Plano, TX (US)
Filed by Diodes Incorporated, Plano, TX (US)
Filed on May 7, 2024, as Appl. No. 18/657,751.
Application 18/657,751 is a division of application No. 17/690,842, filed on Mar. 9, 2022, granted, now 12,002,851.
Claims priority of application No. 202210102438.5 (CN), filed on Jan. 27, 2022.
Prior Publication US 2024/0290838 A1, Aug. 29, 2024
Int. Cl. H10D 62/10 (2025.01); H10D 8/01 (2025.01); H10D 62/40 (2025.01)
CPC H10D 62/124 (2025.01) [H10D 8/041 (2025.01); H10D 62/40 (2025.01)] 18 Claims
OG exemplary drawing
 
1. A method comprising:
providing a substrate having a first conductivity type, and having a first surface and a second surface opposite to the first surface;
diffusing impurities into the substrate to form a first diffusion layer having the first conductivity type and a second diffusion layer having a second conductivity type, wherein the second diffusion layer is formed by forming an upper diffusion layer having the first conductivity type, removing at least a portion of the upper diffusion layer and inverting the rest of the upper diffusion layer from the first conductivity type to the second conductivity type;
forming a plurality of diffusion regions having the first conductivity in the second diffusion layer having the second conductivity type;
forming a square groove ring in the substrate, wherein:
the square groove ring extends through the second diffusion layer and the substrate, and extends into the first diffusion layer;
forming a glass layer over the square groove ring;
forming a first electrode layer on the first diffusion layer; and
forming a second electrode layer on the second diffusion layer, wherein the second electrode layer is in contact with the plurality of diffusion regions.