US 12,382,647 B2
Semiconductor device and method for manufacturing semiconductor device
Shingo Kabutoya, Kyoto (JP)
Assigned to KYOCERA CORPORATION, Kyoto (JP)
Appl. No. 17/920,221
Filed by KYOCERA Corporation, Kyoto (JP)
PCT Filed Apr. 22, 2021, PCT No. PCT/JP2021/016326
§ 371(c)(1), (2) Date Oct. 20, 2022,
PCT Pub. No. WO2021/215505, PCT Pub. Date Oct. 28, 2021.
Claims priority of application No. 2020-077020 (JP), filed on Apr. 24, 2020.
Prior Publication US 2023/0178663 A1, Jun. 8, 2023
Int. Cl. H10D 8/60 (2025.01); H10D 8/01 (2025.01); H10D 64/01 (2025.01); H10D 64/64 (2025.01)
CPC H10D 8/605 (2025.01) [H10D 8/051 (2025.01); H10D 64/01 (2025.01); H10D 64/64 (2025.01)] 4 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor layer comprising a trench;
an insulating film covering an inner surface of the trench;
a conductor embedded in the trench covered with the insulating film;
a silicide layer, a Schottky junction being formed by the silicide layer and a region being part of a surface of the semiconductor layer and being adjacent to the trench; and
a metal layer covering a region comprising an end face of the silicide layer and an upper end face of the insulating film with no gap between one part and another part of the metal layer on the region, the end face being located at elevations higher than the upper end face of the insulating film covering an inner wall surface of the trench, wherein the metal layer and the silicide layer contain same kind of metallic element.