| CPC H10D 1/042 (2025.01) [H01L 21/0332 (2013.01); H01L 21/31144 (2013.01); H10D 1/716 (2025.01)] | 15 Claims |
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1. A method of forming a semiconductor structure, comprising:
providing a semiconductor substrate, wherein a first stacked structure, a second stacked structure, and a third stacked structure are formed from top to bottom on the semiconductor substrate;
forming a first mask layer having a plurality of first patterns arranged in a staggered manner on the first stacked structure;
etching the first stacked structure by the first mask layer as a mask, to form a first patterned hard mask;
forming a second hard mask on the first patterned hard mask, and forming a second mask layer having a plurality of second patterns arranged in a staggered manner on the second hard mask, wherein the first pattern at least partially overlaps with the second pattern, an overlapping region forms a third pattern, and a plurality of third patterns are arranged in a staggered manner; and
etching the second hard mask and the second stacked structure by the second mask layer as a mask, to form a third patterned hard mask having the third patterns, and etching the third stacked structure based on the third patterned hard mask as a mask, to form contact holes;
wherein the second hard mask comprises a second filling sublayer and a second mask sublayer, the second filling sublayer is formed in gaps of the first patterned hard mask, and the second mask sublayer is formed above the second filling sublayer and the first patterned hard mask.
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