US 12,382,638 B2
Three-dimensional memory device and method of making thereof using double pitch word line formation
Naoki Takeguchi, Nagoya (JP); Masanori Tsutsumi, Yokkaichi (JP); Seiji Shimabukuro, Yokkaichi (JP); and Tatsuya Hinoue, Yokkaichi (JP)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES LLC, Addison, TX (US)
Filed on Jun. 18, 2021, as Appl. No. 17/351,756.
Prior Publication US 2022/0406793 A1, Dec. 22, 2022
Int. Cl. H10B 43/10 (2023.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10D 64/01 (2025.01)
CPC H10B 43/35 (2023.02) [H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A three-dimensional memory device, comprising:
a vertical repetition of multiple instances of a unit layer stack, wherein the unit layer stack comprises, from bottom to top, a seamless insulating layer that is free of any seam therein, a first-type electrically conductive layer, a seamed insulating layer including a horizontally-extending seam therein, and a second-type electrically conductive layer;
memory openings vertically extending through the vertical repetition; and
memory opening fill structures located within the memory openings, wherein each of the memory opening fill structures comprises a respective vertical stack of memory elements, and a seam in one of the seamed insulating layers in the vertical repetition is in direct contact with a sidewall of the memory opening fill structure.