US 12,382,621 B2
Decoupling capacitor inside gate cut trench
Reinaldo Vega, Mahopac, NY (US); Takashi Ando, Eastchester, NY (US); Praneet Adusumilli, Somerset, NJ (US); David Wolpert, Poughkeepsie, NY (US); and Cheng Chi, Jersey City, NJ (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Jun. 22, 2022, as Appl. No. 17/808,178.
Prior Publication US 2023/0422461 A1, Dec. 28, 2023
Int. Cl. H10B 10/00 (2023.01); H01L 23/528 (2006.01); H10D 1/68 (2025.01)
CPC H10B 10/12 (2023.02) [H01L 23/5286 (2013.01); H10D 1/68 (2025.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor structure, the semiconductor structure comprising:
a first power rail and a second power rail;
a first via contact that connects the first power rail to a first portion of a decoupling capacitor through a first gate that is within a n-active region; and
a second via contact that connects the second power rail to a second portion of the decoupling capacitor though a second gate that is within a p-active region,
where the decoupling capacitor comprises a ferroelectric material fill and separates the first gate from the second gate.