US 12,381,703 B2
Full duplex communication techniques
Ahmed Attia Abotabl, San Diego, CA (US); Muhammad Sayed Khairy Abdelghaffar, San Jose, CA (US); Huilin Xu, Temecula, CA (US); Wanshi Chen, San Diego, CA (US); Krishna Kiran Mukkavilli, San Diego, CA (US); Tingfang Ji, San Diego, CA (US); and Shimman Arvind Patel, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jan. 29, 2024, as Appl. No. 18/425,697.
Application 18/425,697 is a continuation of application No. 17/204,644, filed on Mar. 17, 2021, granted, now 11,916,848.
Claims priority of provisional application 62/991,235, filed on Mar. 18, 2020.
Prior Publication US 2024/0171364 A1, May 23, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 5/14 (2006.01); H04W 72/0446 (2023.01)
CPC H04L 5/14 (2013.01) [H04W 72/0446 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method of wireless communication by a wireless communication device, comprising:
communicating full-duplex-slot signaling designating use of a full-duplex-slot format, wherein each symbol communicated using the full-duplex-slot format is configurable to contain a downlink only symbol, an uplink only symbol, or a full-duplex symbol, wherein the full-duplex-slot signaling indicates that another slot format is being overridden with the full-duplex-slot format;
communicating one or more full-duplex-slot parameters indicating a respective symbol to be communicated according to the full-duplex-slot format as downlink only, uplink only, or full-duplex; and
communicating, using the full-duplex-slot format, one or more symbols as downlink only symbols, uplink only symbols, or full-duplex symbols in accordance with the one or more full-duplex-slot parameters.