US 12,381,582 B1
Chip-scale control of reconfigurable radio frequency filters
Warren A. Getlin, Somerville, MA (US); Eric W. Rice, West Lafayette, IN (US); Eric E. Hoppenjans, West Lafayette, IN (US); Steven J. Cuppy, West Lafayette, IN (US); Fischer Bordwell, Henderson, NV (US); and Michael J. McPheters, Wheaton, IL (US)
Assigned to Indiana Microelectronics, LLC, West Lafayette, IN (US)
Filed by Indiana Microelectronics, LLC, West Lafayette, IN (US)
Filed on May 3, 2025, as Appl. No. 19/198,039.
Claims priority of provisional application 63/642,300, filed on May 3, 2024.
Int. Cl. H04B 1/00 (2006.01); H04B 17/21 (2015.01)
CPC H04B 1/0042 (2013.01) [H04B 17/22 (2023.05)] 30 Claims
OG exemplary drawing
 
1. A controller for a reconfigurable radio frequency (RF) filter comprising:
memory configured to store a calibration profile associating each of a plurality of digital command inputs with a plurality of digital to analog converter (DAC) codes;
a plurality of digital to analog converters (DACs) each configured to generate an analog biasing output in response to a DAC code;
a communication interface configured to receive a digital command input; and
control registers configured to retrieve, from the memory, at least one plurality of DAC codes based on the received digital command input, to select a plurality of DAC codes based on the retrieved at least one plurality of DAC codes, and to provide the selected plurality of DAC codes to the plurality of DACs;
wherein at least the plurality of DACs, the communication interface, and the control registers form part of an application specific integrated circuit (ASIC).