| CPC H03M 1/785 (2013.01) [H03M 1/1023 (2013.01); H03M 1/06 (2013.01); H03M 1/0617 (2013.01); H03M 1/74 (2013.01)] | 25 Claims |

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1. A digital-to-analog converter (DAC) circuit, comprising:
a decoder coupled to an input of the DAC circuit;
current-steering cells coupled to an output of the decoder, wherein outputs of the current-steering cells are coupled to a positive output node and a negative output node of the DAC circuit; and
an offset detection circuit comprising:
a comparator having a first input and a second input selectively coupled to the positive output node and the negative output node; and
a digital controller having an input coupled to an output of the comparator and an output coupled to the decoder; and
one or more calibration DACs coupled between the offset detection circuit and one or more of the current-steering cells.
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