CPC H03M 1/34 (2013.01) [G01D 5/14 (2013.01); G01R 17/02 (2013.01)] | 21 Claims |
1. A method, comprising:
configuring switch control circuits to generate a plurality of switch control signals based on configuration data in response to an output of an analog comparator circuit and a modulation clock signal;
configuring a plurality of first analog switches of a program balance current generator to modulate at least one balance current based on at least a first control signal and a second control signal of the plurality of switch control signals, wherein the first control signal and the second control signal have duty cycles that do not overlap;
configuring a second analog switch of the program balance current generator to couple the plurality of first analog switches to a first input of the analog comparator circuit based on a third control signal of the plurality of switch control signals, wherein the second analog switch is configured to modulate a sensor current received at the first input of the analog comparator circuit;
offsetting, responsive to a determination that a voltage at the first input of the analog comparator circuit meets a voltage threshold, the sensor current with the balance current; and
generating a multi-bit digital value from at least a bit stream output by the analog comparator circuit corresponding to the sensor current.
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