US 12,381,517 B2
Amplification system having power amplifier memory correction and/or current collapse correction
Patrick Marcus Naraine, Irvine, CA (US); and Serge Francois Drogi, Flagstaff, AZ (US)
Assigned to Skyworks Solutions, Inc., Irvine, CA (US)
Filed by SKYWORKS SOLUTIONS, INC., Irvine, CA (US)
Filed on Sep. 19, 2022, as Appl. No. 17/948,208.
Claims priority of provisional application 63/247,261, filed on Sep. 22, 2021.
Claims priority of provisional application 63/247,263, filed on Sep. 22, 2021.
Claims priority of provisional application 63/247,267, filed on Sep. 22, 2021.
Claims priority of provisional application 63/247,270, filed on Sep. 22, 2021.
Prior Publication US 2023/0087111 A1, Mar. 23, 2023
Int. Cl. H03F 1/32 (2006.01); H03F 1/02 (2006.01); H03F 3/19 (2006.01); H03F 3/24 (2006.01)
CPC H03F 1/3258 (2013.01) [H03F 1/02 (2013.01); H03F 1/0205 (2013.01); H03F 1/0222 (2013.01); H03F 3/19 (2013.01); H03F 3/245 (2013.01); H03F 2200/129 (2013.01); H03F 2200/451 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A power amplification system comprising:
a power amplifier including an amplifying transistor configured to receive an input signal and provide an amplified signal;
a monitoring system configured to monitor one or more of a supply current for the amplifying transistor, an injection voltage point of the amplifying transistor, forward power at an output of the amplifying transistor, and temperature of the amplifying transistor; and
a control system configured to obtain monitored information, and based on the information, generate a control signal for correcting either or both of a memory effect of the amplifying transistor and a current collapse effect of the amplifying transistor.