US 12,381,514 B2
Power management circuit supporting phase correction in an analog signal
Andrew F. Folkmann, Cedar Rapids, IA (US); Nadim Khlat, Cugnaux (FR); and Mark Connor, Vinton, IA (US)
Assigned to Qorvo US, Inc., Greensboro, NC (US)
Filed by Qorvo US, Inc., Greensboro, NC (US)
Filed on Nov. 29, 2021, as Appl. No. 17/536,189.
Claims priority of provisional application 63/188,029, filed on May 13, 2021.
Claims priority of provisional application 63/188,023, filed on May 13, 2021.
Prior Publication US 2022/0368283 A1, Nov. 17, 2022
Int. Cl. H03F 1/02 (2006.01); H03F 3/195 (2006.01); H03F 3/24 (2006.01)
CPC H03F 1/0222 (2013.01) [H03F 3/195 (2013.01); H03F 3/245 (2013.01); H03F 2200/102 (2013.01); H03F 2200/451 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A power management circuit comprising:
a power amplifier circuit configured to amplify an analog signal based on a modulated voltage; and
an envelope tracking (ET) integrated circuit (ETIC) comprising:
a voltage modulation circuit configured to:
receive an envelope indication signal corresponding to a time-variant power envelope of the analog signal; and
generate the modulated voltage based on the envelope indication signal; and
a phase correction circuit configured to generate a modulated phase correction voltage based on the envelope indication signal to thereby cause a phase change in the analog signal.