US 12,381,176 B2
Semiconductor structure having a conductive feature comprising an adhesion layer and a metal region over and contacting the adhesion layer
Hui-Jung Tsai, Hsinchu (TW); Yun Chen Hsieh, Baoshan Township (TW); Jyun-Siang Peng, Hsinchu (TW); Tai-Min Chang, Taipei (TW); Yi-Yang Lei, Taichung (TW); Hung-Jui Kuo, Hsinchu (TW); and Chen-Hua Yu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 10, 2023, as Appl. No. 18/349,696.
Application 16/576,412 is a division of application No. 16/028,813, filed on Jul. 6, 2018, granted, now 10,522,501, issued on Dec. 31, 2019.
Application 18/349,696 is a continuation of application No. 16/655,466, filed on Oct. 17, 2019, granted, now 11,742,317.
Application 16/655,466 is a continuation of application No. 16/576,412, filed on Sep. 19, 2019, granted, now 11,587,902, issued on Feb. 21, 2023.
Claims priority of provisional application 62/587,836, filed on Nov. 17, 2017.
Prior Publication US 2023/0352442 A1, Nov. 2, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/10 (2006.01); H01L 25/18 (2023.01)
CPC H01L 24/82 (2013.01) [H01L 23/5389 (2013.01); H01L 24/02 (2013.01); H01L 24/16 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 25/105 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/02313 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/18 (2013.01); H01L 2224/24011 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/245 (2013.01); H01L 2224/25171 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/82106 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/97 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/15313 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a device die;
a molding compound encapsulating the device die therein;
a through-via penetrating through the molding compound;
a conductive feature over and contacting one of the device die and the through-via, wherein the conductive feature comprises:
an adhesion layer; and
a metal region over and contacting the adhesion layer, wherein the adhesion layer comprises an extension portion extending laterally beyond the metal region;
a dielectric layer;
a solder region over the dielectric layer;
an underfill contacting the solder region, wherein the solder region and the underfill are spaced apart from the conductive feature by the dielectric layer; a first plurality of Redistribution Lines (RDLs) overlying and electrically coupling to the device die and the through-via, with the conductive feature being one of the first plurality of RDLs, wherein the first plurality of RDLs have a first pitch, and the first plurality of RDLs are substantially free from undercuts; and
a second plurality of RDLs over and electrically coupling to the first plurality of RDLs, wherein the second plurality of RDLs have a second pitch greater than the first pitch, and the second plurality of RDLs have undercuts.