| CPC G09G 3/32 (2013.01) [G09G 2320/0233 (2013.01)] | 20 Claims |

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1. A display panel, comprising:
a pixel driving circuit and sub-pixels, wherein
the pixel driving circuit comprises a pulse width modulation circuit, the pulse width modulation circuit is configured to receive at least a sweep signal, provide a pulse width setting signal and control a light emitting time of at least one of the sub-pixels;
the display panel comprises N types of display areas, and the N types of display areas comprise an h-th type display area and a k-th type display area, wherein N is an integer greater than or equal to two, each of h and k is an integer greater than zero and less than or equal to N;
during a refresh cycle of the display panel, a start time of an effective time period of a sweep signal received by a pixel driving circuit in the h-th type display area is earlier than a start time of an effective time period of a sweep signal received by a pixel driving circuit in the k-th type display area; and
the display panel comprises a first display part and a second display part, and both the first display part and the second display part comprises at least one h-th type display area and at least one k-th type display area.
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