US 12,380,050 B2
Dynamic detection of system hardware configuration with embedded controller
Adolfo S. Montero, Pflugerville, TX (US); and Shao-Ku Huang, Taipei (TW)
Assigned to Dell Products L.P., Round Rock, TX (US)
Filed by Dell Products L.P., Round Rock, TX (US)
Filed on May 4, 2023, as Appl. No. 18/312,529.
Prior Publication US 2024/0370396 A1, Nov. 7, 2024
Int. Cl. G06F 13/40 (2006.01)
CPC G06F 13/4068 (2013.01) 18 Claims
OG exemplary drawing
 
1. An information handling system, comprising:
a central processing unit (CPU);
a system memory, accessible to the CPU;
an encoder configured to:
receive a multi-bit indicator associated with a hardware resource; and
generate an analog signal indicative of the multi-bit indicator; and
an embedded controller (EC) coupled to the CPU wherein the EC is configured to:
receive and process the analog signal to obtain the multi-bit indicator; and
perform an action determined based on the multi-bit indicator;
wherein the encoder includes a passive circuit configured to exhibit a distinct impedance for each permissible value of the multi-bit indicator, wherein the passive circuit comprises:
a plurality of input nodes corresponding to each of a plurality of bits in the multi-bit indicator; and
a plurality of internal nodes including an internal node corresponding to each input node.