| CPC G06F 13/4022 (2013.01) [G06F 12/0831 (2013.01); G06F 13/1663 (2013.01); G06N 3/063 (2013.01); G06F 2213/0038 (2013.01)] | 19 Claims |

|
1. A chiplet system-on-chip comprising:
a host system executing a host operating system, the host system comprising a multi-core central processing unit (CPU), the multi-core CPU comprising a local cache memory system;
a real-time system executing a real-time operating system, the real-time system comprising a first chiplet link;
one or more chiplets, each chiplet comprising a chiplet link coupled to the first chiplet link;
one or more memory devices forming an addressable memory space, the addressable memory space comprising a cacheable memory space and a non-cacheable memory space; and
a hybrid system fabric configured to provide the host system with access to some or all of the cacheable memory space over one or more cacheable memory channels and to provide the real-time system and the one or more chiplets with access to some or all of the non-cacheable memory space over one or more non-cacheable memory channels, each cacheable memory channel comprising a snooping port to maintain cache coherency as to the local cache memory system.
|