US 12,380,030 B2
Persistent storage with dual interface
Shuyi Pei, Santa Clara, CA (US); Jing Yang, Glen Allen, VA (US); and Rekha Pitchumani, Oak Hill, VA (US)
Assigned to Samsung Electronics Co., Ltd., Yongin-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Feb. 1, 2023, as Appl. No. 18/163,208.
Claims priority of provisional application 63/417,940, filed on Oct. 20, 2022.
Prior Publication US 2024/0134796 A1, Apr. 25, 2024
Int. Cl. G06F 12/00 (2006.01); G06F 12/0831 (2016.01); G06F 12/0888 (2016.01); G06F 12/0891 (2016.01)
CPC G06F 12/0833 (2013.01) [G06F 12/0888 (2013.01); G06F 12/0891 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A persistent storage device, comprising:
a processing circuit;
a cache; and
persistent storage,
the processing circuit being configured to perform a method, the method comprising:
receiving a first write request according to a first protocol, wherein the first write request comprises a cache hint corresponding to the first protocol;
based on the cache hint, saving a data payload of the first write request in a first portion of the cache corresponding to the first protocol;
receiving a second write request according to a second protocol; and
saving a data payload of the second write request in a second portion of the cache.