US 12,380,026 B2
Optimizing cache energy consumption in processor-based devices
Darshan Kumar Nandanwar, Bangalore (IN); and Kartik Gunvantbhai Desai, Savarkundla (IN)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on May 30, 2023, as Appl. No. 18/325,419.
Prior Publication US 2024/0403216 A1, Dec. 5, 2024
Int. Cl. G06F 12/0804 (2016.01); G06F 12/1009 (2016.01)
CPC G06F 12/0804 (2013.01) [G06F 12/1009 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/6032 (2013.04); G06F 2212/6082 (2013.01)] 29 Claims
OG exemplary drawing
 
1. A processor-based device, comprising:
a cache controller communicatively coupled to a cache memory device, the cache memory device comprising a tag array and a data array, the cache memory device organized as a plurality of sets each comprising a plurality of tag ways of the tag array and a plurality of data ways of the data array;
an instruction processing circuit configured to process an instruction stream in an instruction pipeline comprising a plurality of pipeline stage circuits;
the instruction processing circuit comprising a way lookup table (WLUT) circuit comprising a plurality of WLUT entries that correspond to a plurality of tags and that store a corresponding plurality of predicted way indicators, wherein:
a count of the plurality of WLUT entries corresponds to a count of the plurality of sets; and
each predicted way indicator of the plurality of predicted way indicators comprises a number N of bits, wherein N is a base two (2) logarithm of a count of the plurality of data ways;
the WLUT circuit is configured to:
receive an effective address (EA) for a memory access request;
determine whether a tag portion of the EA corresponds to a tag of a WLUT entry among the plurality of WLUT entries; and
responsive to determining that the tag portion of the EA corresponds to the tag of the WLUT entry, transmit a predicted way indicator of the WLUT entry to the cache controller, wherein the predicted way indicator comprises an identifier of a predicted tag way among the plurality of tag ways and a corresponding predicted data way among the plurality of data ways; and
the cache controller is configured to:
access, in a set among the plurality of sets corresponding to a set portion of the EA, only the predicted tag way among the plurality of tag ways indicated by the predicted way indicator and only the predicted data way among the plurality of data ways indicated by the predicted way indicator.