US 12,379,987 B1
Digitizer error detection and recovery
Rupali Gupta, Haryana (IN); Atul Gupta, Haryana (IN); Sanjay Verma, Haryana (IN); and Mohit Arora, Haryana (IN)
Assigned to KEYSIGHT TECHNOLOGIES, INC., Santa Rosa, CA (US)
Filed by Keysight Technologies, Inc., Santa Rosa, CA (US)
Filed on Oct. 27, 2023, as Appl. No. 18/384,516.
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/0793 (2013.01) [G06F 11/0769 (2013.01)] 15 Claims
OG exemplary drawing
 
1. An error detection and recovery method for a digitizer, the digitizer including an analog-to-digital converter (ADC), a field programmable gate array (FPGA), a data link of a given interface standard between the ADC and the FPGA, and a display device operatively connected to the FPGA, the FPGA including an IP controller configured according to the interface standard of the data link, the method comprising:
applying an analog input source signal to the ADC;
acquiring data samples on the data link from the ADC to the FPGA;
the IP controller checking the data samples for errors;
when the data samples include errors, (a) the IP controller displaying on the display device a waveform of the captured data samples and an error message, (b) a user adjusting a voltage of the input signal source to within a given peak-to-peak voltage range, and (c) the IP controller resetting the data link without power cycling of the digitizer;
when the data samples do not include errors, displaying on the display device a waveform of the captured data samples.