US 12,379,982 B2
Methods and apparatus for runtime recovery of processor links
Shijie Liu, Shanghai (CN); Tao Xu, Shanghai (CN); Lei Zhu, Shanghai (CN); and Kevin Yufu Li, Shanghai (CN)
Assigned to INTEL CORPORATION, Santa Clara, CA (US)
Appl. No. 18/570,493
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Sep. 24, 2021, PCT No. PCT/CN2021/120220
§ 371(c)(1), (2) Date Dec. 14, 2023,
PCT Pub. No. WO2023/044725, PCT Pub. Date Mar. 30, 2023.
Prior Publication US 2024/0281315 A1, Aug. 22, 2024
Int. Cl. G06F 11/07 (2006.01)
CPC G06F 11/076 (2013.01) [G06F 11/0745 (2013.01); G06F 11/0793 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-transitory computer readable medium comprising instructions that, when executed, cause a machine to at least:
determine an onset of an error based on health of a central processor unit (CPU) port;
calculate a figure of merit (FOM) yield for a plurality of adaptation tasks performed on a lane of the CPU port using a first preset coefficient of a plurality of preset coefficients;
select a preset coefficient based on the calculated FOM yield; and
trigger a link recovery mechanism, using the selected preset coefficient to initiate a link recovery process on the CPU port.