US 12,379,981 B2
Thread weave for cross-instruction set architectureprocedure calls
Jonathan Lindsey Tate, Beltram, TX (US); and Gregory Michael Link, Charlotte, NC (US)
Assigned to Magic Leap, Inc., Plantation, FL (US)
Filed by Magic Leap, Inc., Plantation, FL (US)
Filed on Jun. 18, 2024, as Appl. No. 18/746,709.
Application 18/746,709 is a division of application No. 17/259,020, granted, now 12,164,978, previously published as PCT/US2019/041151, filed on Jul. 10, 2019.
Claims priority of provisional application 62/696,132, filed on Jul. 10, 2018.
Prior Publication US 2024/0338268 A1, Oct. 10, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/54 (2006.01); G06F 8/41 (2018.01)
CPC G06F 9/547 (2013.01) [G06F 8/47 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method of executing an application comprising:
executing a first function of an application that has first, second and third functions, the first function being a main function, on a first processor with at least one of first central processing unit (CPU) instruction set architecture (ISA) objects that are compiled to the first processor, the main function causing sequential execution of:
a first remote proxy call (RPC) on the first processor with at least one of the first CPU ISA objects, the first function calling the first RPC while a second CPU is paused;
the third function on a second processor with at least one of second CPU ISA objects that are compiled to the second processor, the first RPC calling the third function and pausing the first CPU;
the second RPC on the second processor with at least one of the second CPU ISA objects, the third function calling the second RPC while a first CPU is paused; and
the second function on the first processor with at least one of the first CPU ISA objects, wherein the application has a data structure that is used by functions of the first and second CPU ISA objects, the second RPC calling the second function and pausing the second CPU.