US 12,379,929 B2
Branch prediction using loop iteration count
Kai Chirca, Dallas, TX (US); Paul Daniel Gauvreau, Plano, TX (US); and David Edward Smith, Jr., Allen, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Inc., Dallas, TX (US)
Filed on Jan. 13, 2024, as Appl. No. 18/412,504.
Application 18/412,504 is a continuation of application No. 17/578,516, filed on Jan. 19, 2022, granted, now 11,875,155.
Application 17/578,516 is a continuation of application No. 16/888,783, filed on May 31, 2020, granted, now 11,294,681, issued on Apr. 5, 2022.
Claims priority of provisional application 62/855,468, filed on May 31, 2019.
Prior Publication US 2024/0152360 A1, May 9, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/32 (2018.01); G06F 9/38 (2018.01)
CPC G06F 9/325 (2013.01) [G06F 9/3806 (2013.01); G06F 9/3846 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
an instruction pipeline;
a program counter coupled to the instruction pipeline and configured to store a value; and
a branch predictor coupled to the program counter and configured to:
determine that the value corresponds to a beginning of a hyperblock loop by performing a first comparison of the value with a first data set;
in response to the value corresponding to the beginning of the hyperblock loop, determine that a second data set characterizing the hyperblock loop is stored in a memory by performing a second comparison of the value with the second data set, wherein the second data set is different from the first data set; and
predict a number of iterations for the hyperblock loop based on the second data set.