US 12,379,915 B2
Performing security functions using devices having embedded hardware security modules
Sourin Sarkar, Bangalore (IN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 6, 2022, as Appl. No. 17/858,568.
Claims priority of provisional application 63/347,825, filed on Jun. 1, 2022.
Prior Publication US 2023/0391345 A1, Dec. 7, 2023
Int. Cl. B60W 60/00 (2020.01); B60W 50/02 (2012.01); G06F 8/65 (2018.01); G06F 21/57 (2013.01); G06F 21/86 (2013.01); H04W 4/40 (2018.01)
CPC G06F 8/65 (2013.01) [G06F 21/57 (2013.01); G06F 21/86 (2013.01); H04W 4/40 (2018.02)] 24 Claims
OG exemplary drawing
 
1. A host processor associated with a vehicle, comprising:
one or more components configured to:
select, from a plurality of devices that are configured to communicate with the host processor for performing security functions, a first device to serve as a primary device and a second device to serve as a secondary device, wherein:
the first device includes a first memory with an embedded hardware security module and is associated with a first set of nodes of the vehicle,
the second device includes a second memory with an embedded hardware security module and is associated with a second set of nodes of the vehicle,
the first memory and the second memory store information that enables security functions to be performed, in conjunction with the host processor, including one or more of: a node verification to verify that a node of the vehicle has not been tampered with, or a user authorization of a user that attempts to modify the node or replace the node or insert a new node in the vehicle,
the first memory stores first information that enables the first device to perform security functions for the first set of nodes, and second information that enables the first device to perform security functions for the second set of nodes;
the second memory stores the second information that enables the second device to perform security functions for the second set of nodes, and
the second memory does not store the first information;
determine, based on a signal received by the host processor, a failure associated with the first device or the second device; and
initiate a remediation process based on the failure associated with the first device or the second device.