US 12,379,864 B2
Empty page scan operations adjustment
Peng Zhang, Los Altos, CA (US); Murong Lang, San Jose, CA (US); Christina Papagianni, San Jose, CA (US); and Zhenming Zhou, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Mar. 26, 2024, as Appl. No. 18/617,430.
Application 18/617,430 is a continuation of application No. 17/889,757, filed on Aug. 17, 2022, granted, now 11,960,745.
Prior Publication US 2024/0231666 A1, Jul. 11, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0644 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory sub-system comprising a set of memory components; and
a processing device, operatively coupled to the set of memory components and programmed to perform operations comprising:
selecting a portion of the set of memory components that is empty and ready to be programmed;
generating an error count value associated with the portion of the set of memory components; and
updating a scan frequency for performing empty page scan operations for the portion of the set of memory components based on the error count value.