US 12,379,637 B2
Display device including a strip oxide semiconductor overlapping an opening
Hitoshi Tanaka, Tokyo (JP); and Kazuhide Mochizuki, Tokyo (JP)
Assigned to Japan Display Inc., Tokyo (JP)
Filed by Japan Display Inc., Tokyo (JP)
Filed on Feb. 22, 2024, as Appl. No. 18/584,043.
Application 18/584,043 is a continuation of application No. 18/323,030, filed on May 24, 2023, granted, now 11,947,231.
Application 18/323,030 is a continuation of application No. 17/698,317, filed on Mar. 18, 2022, granted, now 11,698,560.
Application 17/698,317 is a continuation of application No. 17/092,862, filed on Nov. 9, 2020, granted, now 11,307,473, issued on Apr. 19, 2022.
Application 17/092,862 is a continuation of application No. 16/892,375, filed on Jun. 4, 2020, granted, now 10,866,478, issued on Dec. 15, 2020.
Application 16/892,375 is a continuation of application No. 16/697,921, filed on Nov. 27, 2019, granted, now 10,705,399, issued on Jul. 7, 2020.
Application 16/697,921 is a continuation of application No. 15/874,199, filed on Jan. 18, 2018, granted, now 10,534,235, issued on Jan. 14, 2020.
Claims priority of application No. 2017-008620 (JP), filed on Jan. 20, 2017.
Prior Publication US 2024/0192562 A1, Jun. 13, 2024
Int. Cl. G02F 1/1368 (2006.01); G02F 1/1343 (2006.01); G02F 1/136 (2006.01); G02F 1/1362 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01); H10D 30/67 (2025.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01)
CPC G02F 1/1368 (2013.01) [G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); H10D 30/6723 (2025.01); H10D 30/6734 (2025.01); H10D 30/6755 (2025.01); H10D 86/423 (2025.01); H10D 86/441 (2025.01); H10D 86/60 (2025.01); G02F 1/134363 (2013.01); G02F 1/13606 (2021.01); G02F 1/136227 (2013.01); G02F 1/13685 (2021.01); G02F 2202/10 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A display device comprising:
a first source line;
a second source line next to the first source line in a first direction;
a first gate line;
a second gate line next to the first gate line in a second direction;
a third gate line next to the second gate line in the second direction; and
an oxide semiconductor crossing the second gate line between the first source line and the second source line, wherein
the second gate line is between the first gate line and the third gate line,
the oxide semiconductor includes a first end and a second end,
the first end of the oxide semiconductor is located between the second gate line and the third gate line in the second direction,
the first end of the oxide semiconductor is located between the first source line and the second source line in the first direction,
the second end of the oxide semiconductor is located between the first gate line and the second gate line in the second direction, and
the second end of the oxide semiconductor is connected to the second source line.