US 12,376,356 B2
Semiconductor devices with backside power rail and methods of fabrication thereof
Chun-Yuan Chen, Hsinchu (TW); Pei-Yu Wang, Hsinchu (TW); Huan-Chieh Su, Changhua (TW); and Chih-Hao Wang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Feb. 28, 2024, as Appl. No. 18/590,820.
Application 18/590,820 is a continuation of application No. 17/542,982, filed on Dec. 6, 2021, granted, now 11,942,530.
Application 17/542,982 is a continuation of application No. 16/936,233, filed on Jul. 22, 2020, granted, now 11,195,930, issued on Dec. 7, 2021.
Prior Publication US 2024/0258397 A1, Aug. 1, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/45 (2006.01); H01L 21/28 (2025.01); H01L 23/535 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H10D 30/67 (2025.01); H10D 62/83 (2025.01); H10D 64/01 (2025.01); H10D 64/62 (2025.01)
CPC H10D 62/83 (2025.01) [H01L 21/28097 (2013.01); H01L 23/535 (2013.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/01 (2025.01); H10D 64/62 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a dielectric fin;
a first source/drain feature having a top surface, a bottom surface, and a first side surface connecting the top surface and the bottom surface, wherein the first side surface faces the dielectric fin;
a first conductive feature disposed above the top surface of the first source/drain feature and in electrical connection with the first source/drain feature;
a second conductive feature disposed between the first side surface of the first source/drain feature and the dielectric fin, wherein the second conductive feature is in contact with the first conductive feature, and
a second source/drain feature;
a semiconductor channel region parallel to the dielectric fin, wherein the first and second source/drain features are disposed on opposing sides of the semiconductor channel region; and
a dielectric fill disposed between the second source/drain feature and the dielectric fin.