| CPC H04N 19/107 (2014.11) [H04N 19/176 (2014.11)] | 3 Claims |

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1. An image encoder comprising:
circuitry; and
a memory coupled to the circuitry;
wherein the circuitry, in operation, determines whether to perform Combined Intra Inter Prediction (CIIP) on a current block,
when the CIIP is determined to be performed on the current block, the circuitry:
limits intra prediction to planar mode, the planar mode using multiple reference pixels for each pixel location of the current block;
calculates, for the entire current block, first values of the current block using the intra prediction;
calculates, for the entire current block, second values of the current block using inter prediction;
calculates, for the entire current block, third values of the current block by weighting the first values and the second values; and
encodes the current block using the third values, and
in the calculating of the third values, the circuitry:
determines a set of weights to be applied to the current block based on a variable, the set of weights including a first weight and a second weight;
applies the first weight to the first values; and
applies the second weight to the second values,
wherein candidates for the set of weights to be applied to the current block include a first set of weights and a second set of weights, the first weight and the second weight of the first set of weights having a same value, the first weight and the second weight of the second set of weights having different values from each other, and
the circuitry switches between different sets of weights for different blocks by determining the set of weights to be applied to the current block from among the candidates.
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