US 12,374,619 B2
Microelectronic devices with different staircased stadiums having consistent multi-tier step riser height, and related systems and methods
Lifang Xu, Boise, ID (US); Harsh Narendrakumar Jain, Boise, ID (US); Indra V. Chary, Boise, ID (US); Umberto Maria Meotto, Rivoli (IT); and Paolo Tessariol, Arcore (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Mar. 30, 2022, as Appl. No. 17/657,264.
Prior Publication US 2023/0317604 A1, Oct. 5, 2023
Int. Cl. H01L 23/52 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10B 20/00 (2023.01); H10B 41/20 (2023.01); H10B 41/27 (2023.01); H10B 41/50 (2023.01); H10B 43/20 (2023.01); H10B 43/27 (2023.01); H10B 51/20 (2023.01); H10B 53/20 (2023.01); H10D 88/00 (2025.01)
CPC H01L 23/5283 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H10B 20/50 (2023.02); H10B 41/20 (2023.02); H10B 41/27 (2023.02); H10B 41/50 (2023.02); H10B 43/20 (2023.02); H10B 43/27 (2023.02); H10B 51/20 (2023.02); H10B 53/20 (2023.02); H10D 88/00 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A microelectronic device, comprising:
a stack structure comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers; and
a series of stadiums within the stack structure and comprising:
a stadium comprising multiple sets of staircases, each individual set of staircases of the multiple sets of staircases being parallel to and vertically offset from each other individual set of staircases of the multiple sets of staircases; and
an additional stadium comprising a single set of staircases,
each of the staircases, of the multiple sets of staircases and of the single set of staircases, comprising steps at ends of the conductive structures, each of the steps defining a riser height encompassing vertical thicknesses of multiple of the tiers.