US 12,374,296 B2
Shift register, driving circuit, driving method and display device
Weixing Liu, Beijing (CN); Wanpeng Teng, Beijing (CN); Zhiqiang Xu, Beijing (CN); Chunfang Zhang, Beijing (CN); Meirong Lu, Beijing (CN); Jintao Peng, Beijing (CN); Xinxing Wang, Beijing (CN); and Huanhuan Wang, Beijing (CN)
Assigned to Beijing BOE Technology Development Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 18/687,937
Filed by Beijing BOE Technology Development Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Aug. 22, 2023, PCT No. PCT/CN2023/114227
§ 371(c)(1), (2) Date Feb. 29, 2024,
PCT Pub. No. WO2025/039184, PCT Pub. Date Feb. 27, 2025.
Prior Publication US 2025/0069554 A1, Feb. 27, 2025
Int. Cl. G09G 3/3266 (2016.01); G09G 3/3233 (2016.01); G11C 19/28 (2006.01)
CPC G09G 3/3266 (2013.01) [G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G11C 19/287 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A shift register, comprising:
an input circuit electrically connected to a first input signal terminal, a second input signal terminal, a first power supply terminal, a second power supply terminal, and a light-emitting control signal terminal, and configured to provide a first power supply voltage of the first power supply terminal or a second power supply voltage of the second power supply terminal to a first node under a control of a first input signal from the first input signal terminal and a second input signal from the second input signal terminal, wherein the light-emitting control signal terminal is electrically connected to the first node;
a processing circuit electrically connected to the first input signal terminal, the first node, the first power supply terminal, and the second power supply terminal, and configured to provide the first power supply voltage or the second power supply voltage to a second node under a control of a potential of the first node and the first input signal, wherein the input circuit is electrically connected to the second node, and the input circuit provides the first power supply voltage or the second power supply voltage to the light-emitting control signal terminal under a control of a potential of the second node; and
an output circuit electrically connected to a first clock signal terminal, the first node, the first power supply terminal, the second power supply terminal, a first output scanning signal terminal and a second output scanning signal terminal, and configured to provide the first power supply voltage or the second power supply voltage to the first output scanning signal terminal under a control of the potential of the first node and a first clock signal from the first clock signal terminal, and provide the first power supply voltage or the second power supply voltage to the second output scanning signal terminal under a control of a potential of the first output scanning signal terminal.