US 12,372,630 B2
Distance measuring device and distance measuring method
Kenichi Tayu, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/291,443
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Dec. 18, 2019, PCT No. PCT/JP2019/049654
§ 371(c)(1), (2) Date May 5, 2021,
PCT Pub. No. WO2020/137755, PCT Pub. Date Jul. 2, 2020.
Claims priority of application No. 2018-245390 (JP), filed on Dec. 27, 2018.
Prior Publication US 2022/0003849 A1, Jan. 6, 2022
Int. Cl. G01S 7/4865 (2020.01); G01S 7/48 (2006.01); G01S 17/10 (2020.01)
CPC G01S 7/4865 (2013.01) [G01S 7/4808 (2013.01); G01S 17/10 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A distance measuring device comprising:
a light source configured to emit light;
a light receiving element configured to receive light reflected from an object reflecting the light;
a variation amplification circuit configured to amplify a variation in a temporal relative relationship between an electrical signal output from the light receiving element and a clock signal;
a synchronizing circuit configured to generate a synchronizing signal by synchronizing the electrical signal with the clock signal on the basis of the electrical signal and the clock signal after the variation is amplified by the variation amplification circuit;
a histogram creating circuit configured to create a histogram based on a period of time from when the light source emits light to when the light receiving element receives reflected light, on the basis of the synchronizing signal generated by the synchronizing circuit; and
a distance calculation circuit configured to calculate a distance to the object on the basis of the histogram created by the histogram creating circuit, wherein
the variation amplification circuit adds jitter to at least one of the electrical signal output from the light receiving element and the clock signal, and
the variation amplification circuit includes
a first addition circuit configured to receive an input of the electrical signal and outputs the electrical signal having jitter added thereto, and
a second addition circuit configured to receive an input of the clock signal and outputs the clock signal having jitter added thereto.