| CPC H10B 43/35 (2023.02) [H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02)] | 20 Claims |

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1. A semiconductor device, comprising:
a stacked body including a plurality of conductive layers that are stacked and spaced from each other in a first direction, the stacked body further having first and second areas arranged along a second direction intersecting the first direction;
an insulating portion extending along the first and second directions in the first and second areas and dividing the conductive layers in a third direction intersecting the first and second directions;
a plurality of first columnar portions each extending along the first direction in the first area and including a first semiconductor layer, wherein a plurality of memory cells are formed at intersections between the conductive layers and the first semiconductor layer;
a plurality of second columnar portions each extending along the first direction in the second area and including an insulator;
a plurality of third columnar portions each extending along the first direction in the second area and including a second semiconductor layer; and
a plurality of contacts each extending along the first direction in the second area and electrically connected to one of the conductive layers, wherein
the second columnar portions are on both sides of the insulating portion in the third direction.
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