US 12,368,567 B2
Half duplex frequency division duplex collision handling
Hong He, San Jose, CA (US); Chunxuan Ye, San Diego, CA (US); Dawei Zhang, Saratoga, CA (US); Haitong Sun, Cupertino, CA (US); Huaning Niu, San Jose, CA (US); Seyed Ali Akbar Fakoorian, San Diego, CA (US); Sigen Ye, San Diego, CA (US); Wei Zeng, Saratoga, CA (US); Weidong Yang, San Diego, CA (US); and Yushu Zhang, Beijing (CN)
Assigned to Apple Inc., Cupertino, CA (US)
Appl. No. 17/759,870
Filed by Apple Inc., Cupertino, CA (US)
PCT Filed Aug. 5, 2021, PCT No. PCT/CN2021/111054
§ 371(c)(1), (2) Date Aug. 1, 2022,
PCT Pub. No. WO2023/010488, PCT Pub. Date Feb. 9, 2023.
Prior Publication US 2024/0297776 A1, Sep. 5, 2024
Int. Cl. H04L 12/26 (2006.01); H04L 5/16 (2006.01); H04W 74/0838 (2024.01)
CPC H04L 5/16 (2013.01) [H04W 74/0838 (2024.01)] 20 Claims
OG exemplary drawing
 
1. A processor of a user equipment (UE) configured to perform operations comprising:
determining that half-duplex frequency division duplex (HD-FDD) is enabled by a network with which the UE is communicating;
identifying a collision between a cell-specific downlink reception and a cell-specific uplink transmission; and
implementing a HD-FDD collision handling technique, wherein the HD-FDD collision handling technique comprises prioritizing a valid random access channel (RACH) occasion (RO) over a cell-specific downlink reception except for a downlink reception corresponding to type 0 common search space (CSS), type OA CSS, type 1 CSS or type 2 CSS which is prioritized over the valid RO, wherein the valid RO is used for a mapping between SSBs and ROs and an invalid RO is not used for the mapping.