US 12,368,417 B2
Programmable optimized band switching LNA
Emre Ayranci, Costa Mesa, CA (US); and Miles Sanner, San Diego, CA (US)
Assigned to pSemi Corporation, San Diego, CA (US)
Filed by pSemi Corporation, San Diego, CA (US)
Filed on Mar. 20, 2023, as Appl. No. 18/186,915.
Application 18/186,915 is a continuation of application No. 16/953,141, filed on Nov. 19, 2020, granted, now 11,611,319.
Application 16/953,141 is a continuation of application No. 16/664,646, filed on Oct. 25, 2019, granted, now 10,862,441, issued on Dec. 8, 2020.
Application 16/664,646 is a continuation of application No. 15/910,924, filed on Mar. 2, 2018, granted, now 10,476,453, issued on Nov. 12, 2019.
Application 15/910,924 is a continuation of application No. 15/430,332, filed on Feb. 10, 2017, granted, now 9,941,849, issued on Apr. 10, 2018.
Prior Publication US 2023/0299727 A1, Sep. 21, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H03F 1/22 (2006.01); H03F 1/02 (2006.01); H03F 1/56 (2006.01); H03F 3/193 (2006.01); H03F 3/195 (2006.01); H03F 3/72 (2006.01); H03H 7/38 (2006.01); H03H 11/28 (2006.01); H04B 1/00 (2006.01); H04B 1/16 (2006.01)
CPC H03F 3/195 (2013.01) [H03F 1/0205 (2013.01); H03F 1/0261 (2013.01); H03F 1/223 (2013.01); H03F 1/565 (2013.01); H03F 3/193 (2013.01); H03F 3/72 (2013.01); H03H 7/38 (2013.01); H03H 11/28 (2013.01); H04B 1/006 (2013.01); H04B 1/16 (2013.01); H03F 2200/111 (2013.01); H03F 2200/294 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01); H03F 2203/7209 (2013.01); H03F 2203/7236 (2013.01)] 35 Claims
OG exemplary drawing
 
1. A front-end circuit comprising:
an input port configured to receive an input signal, wherein the input signal has a frequency within one of at least two frequency ranges;
an output port configured to provide an output signal, wherein the output signal is an amplified version of the received input signal;
a low noise amplifier (LNA) comprising an LNA input coupled to the input port and an LNA output;
an output impedance matching network coupled between the LNA output and the output port; and
a first switched impedance circuit (SIC) having a selectable impedance value and configured to have an impedance value based at least in part on the frequency of the input signal, wherein the first SIC is coupled in parallel with the output impedance matching network and coupled to the LNA output and to the output port.