US 12,368,127 B2
Semiconductor chip package having underfill material surrounding a fan-out package and contacting a stress buffer structure sidewall
Po-Chen Lai, Hsinchu (TW); Ming-Chih Yew, Hsinchu (TW); Shu-Shen Yeh, Taoyuan (TW); Po-Yao Lin, Zhudong Township (TW); and Shin-Puu Jeng, Po-Shan Village (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on May 19, 2022, as Appl. No. 17/748,426.
Claims priority of provisional application 63/273,585, filed on Oct. 29, 2021.
Prior Publication US 2023/0136656 A1, May 4, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01)
CPC H01L 24/32 (2013.01) [H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 21/565 (2013.01); H01L 23/3135 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 24/73 (2013.01); H01L 25/0652 (2013.01); H01L 25/105 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 2224/16135 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/26155 (2013.01); H01L 2224/26175 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81815 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/0652 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1437 (2013.01); H01L 2924/182 (2013.01); H01L 2924/186 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/3512 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A chip package structure, comprising:
a fan-out package that comprises at least one semiconductor die attached to an interposer structure via an array of first solder material portions, a molding compound die frame laterally surrounding the at least one semiconductor die and comprising a molding compound material, and at least one stress buffer structure located on the interposer structure and comprising a stress buffer material having a first Young's modulus, wherein the molding compound material has a second Young's modulus that is greater than the first Young's modulus;
a package substrate that is attached to the fan-out package via an array of second solder material portions;
a first underfill material portion laterally surrounding the array of the first solder material portions and laterally surrounded by the molding compound die frame; and
a second underfill material portion laterally surrounding the fan-out package,
wherein the second underfill material portion contacts a sidewall of one of the at least one stress buffer structure.
 
14. A chip package structure, comprising:
a fan-out package including an interposer structure, at least one semiconductor die attached to the interposer structure via an array of first solder material portions, a molding compound die frame laterally surrounding the at least one semiconductor die and comprising a molding compound material, and at least one stress buffer structure located on the interposer structure and comprising a stress buffer material having a lower Young's modulus than the molding compound material and in direct contact with the molding compound die frame, wherein the at least one stress buffer structure does not have an areal overlap with any of the at least one semiconductor die in a plan view;
a package substrate that is attached to the fan-out package via an array of second solder material portions;
a first underfill material portion laterally surrounding the array of first solder material portions and laterally surrounded by the molding compound die frame; and
a second underfill material portion laterally surrounding the fan-out package,
wherein the second underfill material portion contacts a sidewall of one of the at least one stress buffer structure.
 
16. A chip package structure, comprising:
a fan-out package comprising at least one semiconductor die attached to an interposer structure, a molding compound die frame laterally surrounding the at least one semiconductor die and comprising a molding compound material, and at least one stress buffer structure in contact with the molding compound die frame and comprising a stress buffer material having a first Young's modulus,
wherein the molding compound material has a second Young's modulus that is greater than the first Young's modulus;
a package substrate that is attached to the fan-out package;
a first underfill material portion contacting a top surface of the interposer structure and a bottom surface of each of the at least one semiconductor die; and
a second underfill material portion comprising a horizontally-extending portion contacting a bottom surface of the interposer structure and a vertically-extending portion laterally surrounding the fan-out package and contacting a sidewall of one of the at least one stress buffer structure.