US 12,368,110 B2
Wafer assembly having alignment marks, method for forming same, and wafer alignment method
Guoliang Ye, Hubei (CN); Xing Hu, Hubei (CN); and Hongsheng Yi, Hubei (CN)
Assigned to WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD., Wuhan (CN)
Appl. No. 18/017,986
Filed by WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD., Hubei (CN)
PCT Filed Sep. 28, 2020, PCT No. PCT/CN2020/118560
§ 371(c)(1), (2) Date Jan. 25, 2023,
PCT Pub. No. WO2022/032825, PCT Pub. Date Feb. 17, 2022.
Claims priority of application No. 202010814889.2 (CN), filed on Aug. 13, 2020.
Prior Publication US 2023/0290732 A1, Sep. 14, 2023
Int. Cl. H01L 23/544 (2006.01)
CPC H01L 23/544 (2013.01) [H01L 2223/54426 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A wafer assembly with alignment marks, comprising:
a first wafer, comprising: a first substrate; a first dielectric layer located on the first substrate; a first block mark embedded in the first dielectric layer; a first bonding layer located on the first dielectric layer; and a first dot mark embedded in the first bonding layer, wherein the first dot mark has a top surface flush with a top surface of the first bonding layer; and
a second wafer comprising: a second substrate; a second dielectric layer located on the second substrate; a second block mark embedded in the second dielectric layer; a second bonding layer located on the second dielectric layer; and a second dot mark embedded in the second bonding layer, wherein the second dot mark has a top surface flush with a top surface of the second bonding layer,
wherein: an outer contour line of a projection of the first dot mark on the first substrate encompasses a projection of the first block mark on the first substrate, and an outer contour line of a projection of the second dot mark on the second substrate encompasses a projection of the second block mark on the second substrate;
wherein the first block mark is matched with the second block mark; and
wherein the first dot mark is matched with the second dot mark.