US 12,367,099 B2
Error correction method and apparatus
Yuwei Li, Shenzhen (CN); Xu Zhang, Hangzhou (CN); Wei Li, Shenzhen (CN); Kun Zhang, Chengdu (CN); and Wen Yin, Shenzhen (CN)
Assigned to Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed by HUAWEI TECHNOLOGIES CO., LTD., Guangdong (CN)
Filed on Jun. 1, 2023, as Appl. No. 18/327,374.
Application 18/327,374 is a continuation of application No. PCT/CN2021/123919, filed on Oct. 14, 2021.
Claims priority of application No. 202011406212.1 (CN), filed on Dec. 3, 2020.
Prior Publication US 2023/0325276 A1, Oct. 12, 2023
Int. Cl. G06F 11/10 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/0787 (2013.01); G06F 11/0793 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An error correction method, wherein the error correction method comprises:
detecting that an uncorrected error (UCE) exists in a memory;
obtaining a memory address in which the UCE occurs;
storing preset first data in a location indicated by the memory address;
reading second data from the location;
comparing the preset first data with the second data to determine a first failure location in the location;
in response to determining that the first failure location comprises zero bits, flipping the preset first data;
storing flipped first data in the location indicated by the memory address;
reading third data from the location;
comparing the flipped first data with the third data to determine a second failure location in the location;
flipping target data in raw data stored in the second failure location to convert the UCE to corrected error (CE); and
performing error correction on flipped target data.