US 12,367,098 B2
Method for mitigating error of quantum circuit and apparatus thereof
June-Koo Rhee, Daejeon (KR); Changjun Kim, Daejeon (KR); and Kyungdeock Park, Daejeon (KR)
Assigned to Korea Advanced Institute of Science and Technology, Daejeon (KR)
Filed by Korea Advanced Institute of Science and Technology, Daejeon (KR)
Filed on Oct. 4, 2021, as Appl. No. 17/493,091.
Claims priority of application No. 10-2020-0130044 (KR), filed on Oct. 8, 2020; application No. 10-2020-0175727 (KR), filed on Dec. 15, 2020; and application No. 10-2021-0027981 (KR), filed on Mar. 3, 2021.
Prior Publication US 2022/0114047 A1, Apr. 14, 2022
Int. Cl. G06F 11/10 (2006.01); G06N 3/08 (2023.01); G06N 10/00 (2022.01); G06N 20/00 (2019.01)
CPC G06F 11/1008 (2013.01) [G06N 3/08 (2013.01); G06N 10/00 (2019.01); G06N 20/00 (2019.01)] 15 Claims
OG exemplary drawing
 
1. A method for mitigating an error of a quantum circuit in a quantum computer, the method comprising:
detecting a quantum circuit to be mitigated among a plurality of quantum circuits forming the quantum computer;
invoking a pre-trained deep learning model for mitigating an error of the plurality of quantum circuits;
inferring an error correction value of the detected quantum circuit using the invoked deep learning model; and
mitigating an error of the detected quantum circuit based on the inferred error correction value,
wherein the deep learning model is a deep neural network (DNN) model, and
wherein an independent variable of the DNN model comprises at least one of information G1(a:b) about a number of 1-qubit gates of unitaries positioned between depth a and depth b of the quantum circuit, information G2(a:b) about a number of 2-qubit gates of the unitaries positioned between the depth a and the depth b of the quantum circuit, error information Ea(·|i) about a unitary positioned at the depth a of the quantum circuit, and measurement outcome probability information Pb(·|i) about a unitary positioned at the depth b of the quantum circuit.