US 12,367,041 B2
Seamless place and route for heterogeneous network of processor cores
Jasmina Vasiljevic, Cupertino, CA (US); Ljubisa Bajic, Toronto (CA); Davor Capalija, Cupertino, CA (US); and Stanislav Sokorac, Austin, TX (US)
Assigned to Tenstorrent AI ULC, Toronto (CA)
Filed by Tenstorrent AI ULC, Toronto (CA)
Filed on Mar. 19, 2024, as Appl. No. 18/609,307.
Application 18/609,307 is a continuation of application No. 17/717,769, filed on Apr. 11, 2022, granted, now 11,960,885.
Prior Publication US 2024/0319996 A1, Sep. 26, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/30 (2018.01); G06F 9/38 (2018.01)
CPC G06F 9/3001 (2013.01) [G06F 9/3836 (2013.01); G06F 9/3877 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A method, for executing a complex computation on a heterogeneous set of computational nodes linked together by a set of links in a network, comprising:
compiling, using a table of bandwidth values for the set of links in the network, a set of instructions for routing data for an execution of the complex computation, the set of instructions for routing data and a set of instructions for the execution of the complex computation being generated prior to the execution of the complex computation;
configuring a set of programmable controllers on the heterogeneous set of computational nodes with the set of instructions for routing data;
executing the set of instructions for routing data using the set of programmable controllers; and
routing the data: (i) through the network; (ii) to facilitate the execution of the complex computation by the heterogeneous set of computational nodes; and (iii) in response to the execution of the set of instructions for routing data.