US 12,366,987 B2
Memory management method, memory storage device and memory control circuit unit
Yen Chen Yeh, Hsinchu (TW)
Assigned to PHISON ELECTRONICS CORP., Miaoli (TW)
Filed by PHISON ELECTRONICS CORP., Miaoli (TW)
Filed on Jun. 12, 2023, as Appl. No. 18/332,774.
Claims priority of application No. 112115205 (TW), filed on Apr. 24, 2023.
Prior Publication US 2024/0354024 A1, Oct. 24, 2024
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01)
CPC G06F 3/0647 (2013.01) [G06F 3/061 (2013.01); G06F 3/0688 (2013.01); G06F 12/0246 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A memory management method for a rewritable non-volatile memory module, the memory management method comprising:
activating a data merge operation;
selecting a plurality of first-type physical units and at least one second-type physical unit from the rewritable non-volatile memory module to execute the data merge operation, wherein a data capacity of each of the first-type physical units is less than a data capacity of each of the second-type physical unit, and the first-type physical units comprise a first physical unit in a stable state and a second physical unit not in the stable state, and each of the first-type physical units is configured as a source unit for collecting valid data currently or later in the data merge operation;
copying first data from the first physical unit to the at least one second-type physical unit during a first execution period of the data merge operation; and
storing second data from a host system to the second physical unit configured as the source unit during the first execution period.