| CPC G06F 3/0619 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
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1. A memory device comprising:
memory cells connected to a plurality of word lines;
a read operation performer configured to perform a read operation of applying an equalizing voltage to the plurality of word lines and applying a read voltage to a selected word line among the plurality of word lines;
a fail cell counter configured to count a number of on cells among selected memory cells connected to the selected word line at each of a first time point when a predetermined time elapses from a time when the read voltage is applied, a second time point when a predetermined time elapses from the first time point, and a third time point when a voltage of the selected word line reaches the read voltage; and
a read operation controller configured to control the read operation performer to determine a length of an evaluation period based on a result of comparing the number of on cells at the first time point, the second time point, and the third time point, and configured to sense a voltage of bit lines respectively connected to the selected memory cells after the evaluation period elapses from the time when the voltage of the selected word line reaches the read voltage during the read operation.
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