| CPC G06F 3/0613 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0673 (2013.01)] | 20 Claims |

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1. An apparatus comprising:
an interface for a memory interconnect;
data path circuitry configured to:
implement pulse amplitude modulation (PAM) signaling for data written to or data read from memory via the interface, and
data mask logic that is configured to:
receive, via a set of data lines of the memory interconnect, a set of PAM symbols with respective states that correspond to a group of data bits;
determine, for the set of PAM symbols, a number of the respective states that match a predefined state useful to indicate data masking;
compare the number of the respective states of the set of PAM symbols that match the predefined state to a data masking threshold; and
enable data masking for the group of data bits in response to the number of the respective states that match the predefined state exceeding the data masking threshold.
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