US 12,366,966 B2
Memory system
Takashi Nakagawa, Chofu Tokyo (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Feb. 13, 2024, as Appl. No. 18/440,804.
Claims priority of application No. 2023-021015 (JP), filed on Feb. 14, 2023.
Prior Publication US 2024/0272799 A1, Aug. 15, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a nonvolatile memory including a plurality of memory cells; and
a memory controller configured to execute a data read process of reading data from the plurality of memory cells,
wherein the memory controller is further configured to:
execute a first tracking process to determine a value of a first voltage in a patrol process that is carried out independently of a request from a host;
execute a first data read process to read first data from the nonvolatile memory in response to receiving a read request from the host;
cause the nonvolatile memory to execute a second tracking process using the first voltage when error correction of the first data fails;
receive a value of a second voltage from the nonvolatile memory as a result of the second tracking process; and
execute a second data read process using the second voltage to read second data from the nonvolatile memory.