CPC G06F 3/0613 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 16/0483 (2013.01); G11C 16/349 (2013.01); G11C 7/14 (2013.01)] | 20 Claims |
1. A storage device comprising:
a memory device including a plurality of memory blocks including a plurality of memory cells connected to a plurality of gate lines, memory cells of a first group among the plurality of memory cells including memory cells of a first type, memory cells other than the memory cells of the first group among the plurality of memory cells are a second group, and memory cells of the second group including memory cells of a second type different from the first type; and
a memory controller configured to
control the memory device,
transmit size information of the memory cells of the first group to control a host to program data into the memory cells of the first group,
store an update of the data programmed in the memory cells of the first group with respect to the memory cells of the second group, and
control the host not to perform a plurality of write requests to the same address with respect to the memory cells of the first group more than an allowed number of writes.
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