| CPC H10B 10/12 (2023.02) | 20 Claims |
|
1. A method, comprising:
forming a first gate dielectric layer directly on an upper surface of an interfacial layer in a vertical direction, the interfacial layer being disposed over an active region, wherein the first gate dielectric layer has a first material composition that contains hafnium oxide and has a first thickness;
forming a second gate dielectric layer over the first gate dielectric layer such that a bottom surface of the second gate dielectric layer is formed directly on an upper surface of the first gate dielectric layer, wherein the second gate dielectric layer has a second material composition that contains zirconium oxide, titanium oxide, or lanthanum oxide and has a second thickness, wherein the second material composition and the first material composition are both different from a third material composition of the interfacial layer on which the first gate dielectric layer is formed directly, and wherein the forming the first gate dielectric layer and the forming the second gate dielectric layer is performed such that a ratio of the first thickness and the second thickness is in a range between about 2:1 and about 3.6:1; and
forming a metal-containing gate electrode directly on an upper surface and side surfaces of the second gate dielectric layer.
|
|
10. A method, comprising:
depositing a first gate dielectric layer directly on a surface of an interfacial layer, wherein the first gate dielectric layer has a first thickness and a first material composition comprising hafnium oxide, wherein the first gate dielectric layer has a first peak concentration level of the first material composition;
depositing a bottom surface of a second gate dielectric layer directly on a top surface of the first gate dielectric layer, wherein the second gate dielectric layer has a second thickness and a second material composition comprising zirconium oxide, titanium oxide, or lanthanum oxide, wherein the first material composition and the second material composition are each different from a third material composition of the interfacial layer, wherein the depositing the first gate dielectric layer and the depositing the second gate dielectric layer is performed such that a ratio of the first thickness and the second thickness is in a range between about 2:1 and about 3.6:1, and wherein the second gate dielectric layer has a second peak concentration level of the second material composition, and wherein a ratio of the first peak concentration level and the second peak concentration level is in a range between about 6:1 and about 22:1; and
forming a metal-containing gate electrode directly on a surface of the second gate dielectric layer.
|
|
13. A method, comprising:
forming an interfacial layer over a channel region of a substrate, the interfacial layer containing silicon dioxide;
depositing, using a first atomic layer deposition (ALD) process, a first type of dielectric material as a first part of a gate dielectric directly on the interfacial layer, wherein the first type of dielectric material has a first thickness and contains hafnium oxide;
depositing, using a second ALD process, a second type of dielectric material as a second part of the gate dielectric over the first type of dielectric material, wherein a bottom surface of the second type of dielectric material is deposited directly on an upper surface of the first type of dielectric material that faces upwards in a vertical direction, wherein a side surface of the second type of dielectric material is in direct contact with a side surface of the first type of dielectric material that faces a horizontal direction, wherein the second type of dielectric material has a second thickness and contains zirconium oxide, titanium oxide, or lanthanum oxide, and wherein the first ALD process and the second ALD process are configured such that a ratio of the first thickness and the second thickness is in a range between about 2:1 and about 3.6:1; and
forming a metal-containing gate electrode directly on the second type of dielectric material, wherein a bottom surface of the metal-containing gate electrode is formed to be in direct contact with an upper surface of the second type of dielectric material that faces upwards in the vertical direction.
|