CPC H01S 5/02469 (2013.01) [H01L 23/3735 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01S 5/02315 (2021.01); H01S 5/183 (2013.01)] | 20 Claims |
1. A substrate, comprising:
a thermally conductive metal core having a top side and a bottom side;
a first dielectric coating on the top side of the metal core;
a second dielectric coating on the bottom side of the metal core,
wherein the first dielectric coating and the second dielectric coating have respective thicknesses that are less than sixty micrometers, and
wherein the first dielectric coating and the second dielectric coating have respective thermal resistances that are less than fifteen degrees Celsius per watt;
a first metal circuit layer formed above the first dielectric coating;
a second metal circuit layer formed under the second dielectric coating; and
a via through the first dielectric coating or the second dielectric coating,
wherein the via is filled with metal to provide an electrical connection to the metal core from the first metal circuit layer or the second metal circuit layer,
wherein one or more electrical currents flowing vertically across one or more of the first dielectric coating or the second dielectric coating, or horizontally along one or more of the metal core, the first metal circuit layer, or the second metal circuit layer, have a low parasitic inductance based on the respective thicknesses of the first dielectric coating and the second dielectric coating, and
wherein the metal core dissipates heat that flows across one or more of the first dielectric coating or the second dielectric coating and into the metal core.
|