US 12,364,167 B2
Semiconductor structure including two shielding layers and manufacturing method thereof
YuLei Wu, Hefei (CN); Baolei Wu, Hefei (CN); Xiaoguang Wang, Hefei (CN); and Er-Xuan Ping, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Appl. No. 17/593,874
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Anhui (CN)
PCT Filed Mar. 9, 2021, PCT No. PCT/CN2021/079674
§ 371(c)(1), (2) Date Jul. 27, 2022,
PCT Pub. No. WO2021/208637, PCT Pub. Date Oct. 21, 2021.
Claims priority of application No. 202010300660.7 (CN), filed on Apr. 16, 2020.
Prior Publication US 2023/0217837 A1, Jul. 6, 2023
Int. Cl. H10N 50/00 (2023.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01)
CPC H10N 50/80 (2023.02) [H10B 61/00 (2023.02); H10N 50/01 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor structure, comprising:
providing a substrate;
forming a first shielding layer on the substrate;
forming a first electrode, wherein the first electrode penetrates the first shielding layer;
forming a storage structure on the first electrode;
forming a second shielding layer on a top surface and side walls of the storage structure, wherein the first shielding layer and the second shielding layer combine to form a shielding layer; and
forming a second electrode, wherein the second electrode penetrates the shielding layer and electrically connects to the storage structure;
wherein the storage structure comprises a magnetic stacked layer structure;
wherein the forming the first electrode which penetrates the first shielding layer comprises:
forming a first dielectric layer on the first shielding layer; and
forming a first opening through the first dielectric layer and the first shielding layer, wherein the first electrode is formed in the first opening.