US 12,364,067 B2
Semiconductor device
Chun-Yu Lin, Hsinchu (TW); Jun-Yi Li, Hsinchu (TW); Yi-Yang Chiu, Hsinchu (TW); Chun-Wei Chang, Hsinchu (TW); Yi-Ming Chen, Hsinchu (TW); Chang-Hsiu Wu, Hsinchu (TW); Wen-Luh Liao, Hsinchu (TW); Chen Ou, Hsinchu (TW); and Wei-Wun Jheng, Hsinchu (TW)
Assigned to EPISTAR CORPORATION, Hsinchu (TW)
Filed by EPISTAR CORPORATION, Hsinchu (TW)
Filed on Jul. 8, 2022, as Appl. No. 17/860,749.
Claims priority of application No. 110125375 (TW), filed on Jul. 9, 2021.
Prior Publication US 2023/0010081 A1, Jan. 12, 2023
Int. Cl. H10H 20/832 (2025.01); H10H 20/82 (2025.01); H10H 20/831 (2025.01); H10H 20/833 (2025.01); H10H 20/84 (2025.01)
CPC H10H 20/835 (2025.01) [H10H 20/82 (2025.01); H10H 20/8316 (2025.01); H10H 20/833 (2025.01); H10H 20/84 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor stack comprising a first semiconductor structure, an active structure and a second semiconductor structure, wherein the first semiconductor structure includes a first surface, the first surface has a first area and comprising a first portion and a second portion;
a third semiconductor structure connected to the first portion and including a second surface with a second area;
a dielectric layer connected to the second portion, and comprising a plurality of openings having a third area; and
a reflecting layer located on one side of the third semiconductor structure opposite to the first semiconductor structure;
wherein a ratio of the second area of the third semiconductor structure to the first area of the first surface is in a range of 0.1 to 0.7, and a ratio of the third area of the openings to the first area of the first surface is less than 0.2.